Newer
Older
Priyanka Raina
committed
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
LAYOUT PATH "./design.extracted.spice"
LAYOUT PRIMARY "${design_name}"
LAYOUT SYSTEM SPICE
SOURCE PATH "./design.lvs.v.spice"
SOURCE PRIMARY "${design_name}"
SOURCE SYSTEM SPICE
MASK SVDB DIRECTORY "svdb" QUERY
LVS REPORT "outputs/lvs.report"
LVS ISOLATE SHORTS YES
LVS REPORT OPTION S
// Case sensitive
LAYOUT CASE YES
SOURCE CASE YES
// Black box all std cells if Magic is also black boxing
//LVS BOX "sky130_*"
LVS BOX "sky130_sram*"
LVS BOX "sky130_fd_pr*"
LVS DEVICE TYPE NMOS sky130_fd_pr__nfet_01v8
LVS DEVICE TYPE NMOS sky130_fd_pr__nfet_01v8_hvt
LVS DEVICE TYPE PMOS sky130_fd_pr__pfet_01v8
LVS DEVICE TYPE PMOS sky130_fd_pr__pfet_01v8_hvt
LVS DEVICE TYPE RESISTOR sky130_fd_pr__res_generic_po
// Very important! Magic uses slashes as part of the name
LVS SPICE SLASH IS SPACE NO
LVS SPICE PREFER PINS YES
LVS ABORT ON SUPPLY ERROR NO
LVS RECOGNIZE GATES NONE
LVS IGNORE PORTS NO
LVS CHECK PORT NAMES YES
LVS ABORT ON SOFTCHK NO
LVS SHOW SEED PROMOTIONS NO
LVS SHOW SEED PROMOTIONS MAXIMUM 50
LVS POWER NAME "VDD" "VPWR"
LVS GROUND NAME "VSS" "VGND"
LVS SPICE OVERRIDE GLOBALS YES
LVS GLOBALS ARE PORTS NO
VIRTUAL CONNECT COLON YES
VIRTUAL CONNECT REPORT NO
LVS EXECUTE ERC YES
ERC RESULTS DATABASE "erc.results"
ERC SUMMARY REPORT "erc.summary" REPLACE HIER
ERC CELL NAME YES CELL SPACE XFORM
ERC MAXIMUM RESULTS 1000
ERC MAXIMUM VERTEX 4096